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Автор: radioaktiv от 18-06-2013, 09:44
Page 1. 1 Features • Utilizes the AVR® RISC Architecture • AVR – High-performance and Low-power RISC Architecture ...
Автор: radioaktiv от 18-06-2013, 09:44
Page 1. 1 8TQFP 2 3 1 INDEX CORNER 3 4 P1.0 VC C P1.1 P1.2 P1.4 P1.3 NC 4 2 4 3 4 0 4 1 6 5 4 4 4 3 2 2 6 2 5 2 8 2 7 2 4 1 8 1 9 2 0 2 1 2 2 ...
Автор: radioaktiv от 18-06-2013, 09:44
High Speed low power (1.8V), 32 MC, In-system Programmable
Автор: radioaktiv от 18-06-2013, 09:44
Page 1. Features • High Performance, Low Power AVR® 8-Bit Microcontroller • Advanced RISC Architecture – 120 Powerful ...
Автор: radioaktiv от 18-06-2013, 09:44
5K - 50K Gate FPGA with DSP Optimized Core Cell and Distributed FreeRam, Enhanced Performance Improvement and Bi-directional I/Os (3.3 V).
Автор: radioaktiv от 18-06-2013, 09:44
Page 1. Copyright © 1999, 2000 ARM Limited. All rights reserved. ARM DDI 0165B ARM9E-S (Rev 1) Technical Reference Manual Page 2. ...
Автор: radioaktiv от 18-06-2013, 09:44
Page 1. Features • High performance, low power AVR® 8-bit Microcontroller • Advanced RISC architecture – 135 powerful ...
Автор: radioaktiv от 18-06-2013, 09:44
500 gate high-speed, zero power electrically erasable PLD, 24 and 28 pins, 5V
Автор: radioaktiv от 18-06-2013, 09:44
This document may have been updated by ARM, please check the ARM web site for its latest version.
Автор: radioaktiv от 18-06-2013, 09:44
Not Recommended for New Design. 64K EEPROM with Ready/Busy